Memory Design Engineer

Company Overview Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions. Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology. We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency. At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve. If that's you, join us — the intelligence everywhere revolution starts here. Company Overview Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With increased power requirements of artificial intelligence (AI) computing, our customers increasingly rely on our solutions to deliver AI to edge environments. Our hardware and software innovations fundamentally deliver a multi-fold improvement in power consumption over traditional semiconductor designs without expensive process geometry scaling. We started in 2010 addressing the needs of battery-powered devices at the edge, where power consumption challenges were most profound. As of the beginning of 2025, we’ve shipped more than 260 million units worldwide. Our innovative and fast-moving teams of design, research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin and San Jose), Taiwan (Hsinchu), China (Shenzhen and Shanghai), Japan (Tokyo), and Singapore. We value relentless technology innovation, a deep commitment to customer success, collaborative problem-solving, and an enthusiastic pursuit of energy efficiency. We embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies. We encourage and nurture an environment for growth and opportunities to work on complex, meaningful, and challenging projects that will create a lasting impact and shape the future of technology. Join us on our quest for 100 billion devices. The edge intelligence revolution starts here. Scope We are seeking an experienced Memory Design Engineer to work on the architecture, design, compiler development, characterization, and silicon validation of embedded SRAM and Register File (RF) IPs for ultra-low-power SoCs. The ideal candidate will possess strong expertise in SRAM compiler development, custom memory circuit design, timing and power characterization, silicon correlation, and production-quality memory IP delivery. This role requires close collaboration with architecture, physical design, product engineering, foundry, EDA vendors, and silicon validation teams to develop highly optimized embedded memories operating across conventional, near-threshold, and sub-threshold voltage ranges. This role is critical in ensuring robust memory operation across extreme low-voltage conditions, aligned with Ambiq SPOT principles. Responsibilities • Design ultra-low power embedded SRAM and Register File IPs for advanced SoC products. • Develop and enhance SRAM compiler architectures supporting multiple memory configurations, banking schemes and redundancy options. • Design and optimize memory peripheral circuits such as sense amplifiers, write drivers, decoders, word-line drivers, pre-charge circuits, Read/write assist circuits, redundancy and repair logic • Optimize memory designs for Area, Performance, Leakage power, Dynamic power, yield and manufacturability. Correlate simulation and characterization results with silicon measurements and production test data. • Analyze low-voltage failure mechanisms including read disturb, write failure, read/write margins, retention failures and process variation effects • Drive memory yield improvement through silicon debug, characterization analysis, and design optimization. • Develop automation scripts using Python, Tcl, or Perl to improve compiler generation, characterization efficiency, regression, and design productivity. • Collaborate with Memory architecture teams, Physical design, Timing and STA teams, DFT/BIST engineers, Product and test engineering, Foundry partners and EDA vendors • Support memory IP integration into SoC products from architecture through production release. • Document methodologies, design guidelines, characterization results, and silicon learnings. Qualifications • Bachelor’s, Master’s, or PhD in Electrical Engineering, Electronics, or related discipline. • Strong understanding of SRAM architecture, compiler design, and custom memory circuit design. • Proven experience developing embedded SRAM or Register File IP for advanced 12nm FINFET technologies and below. • Hands-on experience with SRAM compiler development and configurable memory generation. • Strong expertise in custom memory characterization and production-quality Liberty (.lib) generation. • Deep knowledge of bit-cell operation, sense amplifier design, read/write assist techniques, low-voltage SRAM operation, process variation analysis, timing and power characterization • Experience with Cadence Virtuoso, Spectre, HSPICE or equivalent SPICE simulators, Cadence Liberate MX and Monte Carlo simulations • Familiarity with memory compiler arch…