Ethos Search Associates Pte. Ltd. · MyCareersFuture · 1w
Senior / MTS Product Quality Engineer (ATE)***
Singapore- Posted
- 2026-09-28 (1w)
- Place
- Singapore
- Commitment
- Full Time
- Salary
- SGD 5,000 – 9,000 / month
- Experience
- 3+ YOE
- Education
- PhD
- Department
- Engineering
- Source
- MyCareersFuture (the employer’s own listing)
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Skills in this posting
SemiconductorsAutomatic Test EquipmentX86PythonC++PerlShell ScriptingDebuggingLinuxUnixData AnalysisAI Agents
Responsibilities
• Lead or contribute to component debug for customer-return and manufacturing-test failures using production ATE and electrical characterization methods.
• Debug and optimize ATE test programs, test methods, test limits, levels, timings and production test flows.
• Analyze ATE datalogs, failure signatures, shmoo results and characterization data to isolate silicon, design, test, process or application-related causes.
• Develop and execute electrical experiments and characterization plans to validate hypotheses.
• Drive root-cause investigations, containment, corrective actions and recurrence prevention.
• Develop automation, data-analysis and diagnostic tools using Python, C/C++, Tcl, Perl or Unix shell scripting.
• Prepare clear technical reports and communicate conclusions, risk and recommended actions to engineering and management stakeholders.
• Lead cross-functional technical projects appropriate to the assigned job level and mentor engineers in ATE debug and failure-analysis methods.
Requirements:
• Senior Engineer: BS with 5+ years, MS with 3+years, or PhD with 0–1+ years of relevant experience.
• BS with 8+ years, MS with 6+ years, or PhD with 3+ years of relevant experience
• ATE debug for x86, CPU, SoC or other complex digital semiconductor products.
• Strong understanding of VERIGY 93K based test-program architecture, development and execution.
• Experience debugging test programs, test methods, patterns, vectors, functional failures, parametric failures and limit-related issues.
• Experience interpreting tester datalogs, design and run DOE for failure-signature analysis.
• Working knowledge of DFT concepts including ATPG scan, scan compression, logic diagnosis, memory BIST and JTAG/boundary scan.
• Debug of high-speed interfaces such as PCIe, DDR, USB, SATA or Ethernet using ATE-based methods.
• Strong knowledge of digital logic, circuit analysis, CMOS fundamentals, semiconductor device behavior and electrical failure mechanisms is highly desirable.
• Proficiency in at least one relevant language: Python, C/C++, Tcl, Perl, Verilog, VHDL or Unix shell.
• Working knowledge of Linux and structured engineering data analysis.
• Experience integrating AI agents into daily workflows is highly desirable.
Ethos Search Associates Pte. Ltd.
EA License No: 13C6655
EA Reg No: R1988580 Jacky Chong
Ethos Search Associates Pte. Ltd.
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