Focaltrans Pte. Ltd. · MyCareersFuture · 1w
Senior IC Logic Design / STA Engineer
Singapore, Central- Posted
- 2026-10-01 (1w)
- Place
- Singapore, Central
- Commitment
- Full Time
- Salary
- SGD 7,000 – 12,000 / month
- Experience
- 8+ YOE
- Education
- Bachelor's
- Department
- Engineering
- Source
- MyCareersFuture (the employer’s own listing)
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Skills in this posting
Quality Control
Job Responsibilities
• Responsible for logic synthesis, LEC and ECO implementation , as well as quality control throughout the development process. Work closely with the front-end design team to establish timing constraints and ensure timely timing closure.
• Responsible for full-chip STA execution and timing constraint quality control , working closely with the back-end design team to complete timing sign-off .
Job Requirements
• Bachelor’s degree or above in Computer Engineering, Electrical/Electronic Engineering, Communications Engineering or a related discipline, with 8+ years of relevant industry experience .
• Strong proficiency in SDC and hands-on experience with Design Compiler (DC), Formality and PrimeTime (PT) , with solid Tcl scripting skil
Focaltrans Pte. Ltd.
2 open roles in Singapore, straight from Focaltrans Pte. Ltd.’s own careers page.
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