Curious Tek Pte. Ltd. · MyCareersFuture · 1mo
Analog Design Engineer
Central Region, Singapore- Posted
- 2026-08-17 (1mo)
- Place
- Central Region, Singapore
- Commitment
- Full Time
- Salary
- SGD 6,000 – 8,000 / month
- Experience
- 5+ YOE
- Education
- Bachelor's
- Department
- Engineering
- Source
- MyCareersFuture (the employer’s own listing)
Your match
Sign in to see how your skills match this job.
Job Responsibilities:
· Design and implementation of mixed signal CMOS IP. Development cycle including circuit design, simulation, modeling, verification and bench characterization.
· Management products utilizing leading edge sub-micron CMOS technologies, e.g., 5/6nm
· Developing state of the art high speed mixed signal IP products that include op amps, comparators, bandgap, low-drop linear regulator, ADCs, DC-DC converters, and high bit-rate (Gbps) Serdes TX/RX.
Requirements:
· Bachelor or above degree in Microelectronic or Electronic and Information Engineering
· 5 years or above experience in the area of analog design
· Good knowledge in analog IC design in high speed Serdes, e.g., PLL, CDR, CTLE/DFE, TX driver etc.
• Solid understanding and experience in key analog layout considerations such as device matching, parasitic, noise coupling, floor planning, sensitive signal routing, current density and reliability considerations
• Familiar with SPICE simulation tool (e.g., Cadence spectre, Synopsys Custom Compiler, Calibre)
· Strong Communication skills, high level of independence, self-motivation and good team player
Curious Tek Pte. Ltd.
3 open roles in Singapore, straight from Curious Tek Pte. Ltd.’s own careers page.
- RTL DesignerCentral Region, Singapore · 1w
- Layout EngineerCentral Region, Singapore · 1mo