Vanguard International Semiconductor Singapore Pte. Ltd. · MyCareersFuture · 1w
Senior Engineer/ Engineer (Integration - Yield)
Singapore, East- Posted
- 2026-10-01 (1w)
- Place
- Singapore, East
- Commitment
- Full Time
- Salary
- SGD 4,200 – 6,600 / month
- Experience
- 2+ YOE
- Education
- Master's
- Department
- Engineering
- Source
- MyCareersFuture (the employer’s own listing)
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Skills in this posting
TroubleshootingExternal AuditSearch Engine MarketingChemical EngineeringContinuous Improvement
Job Purpose:
• To liaise with module engineers on defect excursion control
• To drive for defect reduction and yield improvement activities
Job Description:
• Supervise YE Associate Engineers and wafer tech operators to ensure smooth 24/7 inline shift operati
• Train and certify YE Associate Engineers on recipe creation and defect source knowledge
• Maintain and enhance internal SOP/OCAP and involve in internal;/external audit
• Operate FIB/SEM/EDX/OM for inline failure analysis
• Operate and create recipes in Brightfield, Darkfield and other defect inspection tool
• Perform partition analysis on defect source and detailed reports on issues
• Build and develop defect source library.
• Track inline defect performance by layer/process tool/chamber on weekly basis
• Perform killer ration analysis
• Perform defect characterization by process tools
• Continuous improvement activities on defect reductions with Modules / vendors / equipment team
• Liaise with process engineers in different modules to troubleshoot for inline defects and defect reduction activities
• Provide scan support in low yield investigation & co-work with Module/PI/PE on technology & device specific yield enhancement activities
• Automate daily activities to improve troubleshooting speed of team
• Responsible for wafer quality to conform to product requirements and have the authority to stop shipment and stop production to correct quality problems
Job Requirements:
• Masters / Degree in Electrical and Electronic Engineering/ Electronic Engineering / Material Science / Chemical Engineering / Electronic and Physics
• 2 – 6 years relevant fab work experience in high volume manufacturing of electronics components in an Front-end semi-conductor industry.
• Experience in defect analysis and yield enhancement is required.
• Excellent interpersonal and communication skills with good leadership capability.
• Team player.
• Responsible and accountable for complying with and implementing environmental, health, safety and security (EHSS) system, policies, procedures and guidelines that are applicable to your scope of work, thereby maintaining a healthy and safe workplace.
Vanguard International Semiconductor Singapore Pte. Ltd.
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