R&D Process Engineer (Die-to-Wafer)

About the role Develop, optimize, and qualify Die-to-Wafer (D2W) processes, including Flipchip and Underfill, for advanced semiconductor packaging applications. Support process readiness, yield improvement, process robustness, and customer-specific technical solutions from development through NPI. Establish and maintain R&D process flows, recipes, instructions, and device information in MES to support engineering and qualification builds. Key responsibilities • Develop and qualify D2W processes, including Flipchip and Underfill, for advanced packaging applications such as 2.5D, Fan-In, and Fan-Out • Perform hands-on process setup, DOE, optimization, characterization, and continuous improvement using statistical tools such as JMP • Support process and yield improvement to achieve robust and scalable manufacturing processes • Develop and review FMEA, OCAP and Control Plans to identify and mitigate process risks • Create and maintain MES process flows, recipes, process instructions, BOM, and device information for R&D builds • Support process monitoring and reporting, including staging-time and yield monitoring, to facilitate transition to NPI • Collaborate with NPI, Operations, Quality and Equipment teams to support process qualification, technology transfer and manufacturing readiness About you • Bachelor's degree in Engineering (Mechanical, Materials, Electronics, or related disciplines) • 3–5 years of hands-on semiconductor process engineering experience preferred • Experience in Die-to-Wafer, Flip Chip, Underfill, die attach, or advanced packaging processes is an advantage • Strong problem-solving and analytical skills • Good communication skills with the ability to work effectively with cross-functional teams • Ability to work independently and manage multiple engineering activities in a fast-paced semiconductor environment • Fresh Engineering Graduates with strong interest in semiconductor process development are welcome to apply