Senior Process Engineer

Role Summary Develop, optimize, and qualify thin-film deposition processes supporting advanced packaging and wafer-level integration. The engineer will own film performance, uniformity, stress, adhesion, composition, defectivity, process stability, and integration with the overall packaging process flow. Key Responsibilities • Develop and optimize CVD, PECVD, and related thin-film deposition processes. • Develop dielectric, passivation, barrier, liner, and other films used in advanced packaging. • Optimize film thickness, uniformity, composition, stress, adhesion, and deposition rate. • Establish and maintain robust deposition process windows. • Troubleshoot particles, film non-uniformity, adhesion failures, contamination, chamber drift, and process excursions. • Design and execute DOEs for process characterization and optimization. • Establish SPC and process-control methodologies. • Characterize deposited films using appropriate analytical and metrology techniques. • Qualify new processes, materials, precursors, and equipment. • Work closely with lithography, etch, CMP, plating, bonding, integration, metrology, and manufacturing teams. • Support process transfer and manufacturing ramp. Required Qualifications • BS or MS in Materials Science, Chemical Engineering, Chemistry, Electrical Engineering, Applied Physics, or related field. • 5+ years of semiconductor thin-film deposition or process-engineering experience. • Hands-on experience with CVD, PECVD, PVD, ALD, or related deposition technologies. • Strong understanding of thin-film deposition mechanisms and process chemistry. • Experience controlling film thickness, uniformity, stress, adhesion, composition, and defectivity. • Experience developing and optimizing semiconductor deposition recipes. • Strong troubleshooting skills related to chamber performance, particles, film defects, and process excursions. • Working knowledge of DOE, SPC, process capability, and root-cause analysis. • Experience with semiconductor film characterization and metrology. Preferred Qualifications • Advanced packaging, wafer-level packaging, RDL, TSV, or heterogeneous-integration experience. • Experience with SiN, SiO₂, passivation, dielectric, barrier, or seed-layer processes. • Hybrid-bonding process experience. • Process-integration experience across multiple semiconductor modules. • Experience transferring thin-film processes into volume manufacturing.