Cadenza Solutions Pte. Ltd. · MyCareersFuture · 3d
Test Engineer
Singapore- Posted
- 2026-10-05 (3d)
- Place
- Singapore
- Commitment
- Full Time
- Salary
- SGD 6,500 – 9,000 / month
- Experience
- 5+ YOE
- Education
- Diploma
- Department
- Information Technology
- Source
- MyCareersFuture (the employer’s own listing)
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Skills in this posting
Electrical Engineering
Job Description & Requirements
Job description
• Test program development for Digital, PMIC, RF& Mixed Signal products on ATE (primarily on Advantest 93k - SmarTest 7,SmarTest 8 / Teradyne UFLEX)
• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities
• Debug of digital vectors (JTAG/SCAN/ATPG /Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)
• Understanding and experience in characterization of Mixed Signal IP (ADC, DAC, PLL and
• Involve on test program hand off, production release, yield improvement and test time reduction
• High level of collaboration and interaction with diƯerent Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.
Job Requirements
· Graduates from Diploma/ Degree in Electronics /Electrical Engineering
· Minimum 2-5 yrs relevant experience on the Test Engineering is preferred
· Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage.
· Good Knowledge of analog and digital electronicsis desired.
· Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must.
· Very strong verbal and written communication skills and able to work independently
· Only Singaporeans/ SPR preferred.
Cadenza Solutions Pte. Ltd.
2 open roles in Singapore, straight from Cadenza Solutions Pte. Ltd.’s own careers page.
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